Embodiments of the present inventive concepts relate generally to semiconductor packages and, more particularly, to a semiconductor package including a test pad.
As stacked packages manufactured using a conventional wire bonding technique require high-performance characteristics, developments have been conducted on three-dimensional packages to which a through-silicon-via (TSV) technique is applied. A three-dimensional package includes components having various functions that are vertically stacked and may achieve extension of memory capacity, low power consumption, high transmission rate, and high efficiency.
A semiconductor package includes a test pad through which various tests are performed to check reliability of manufactured products.